Generally, integrated circuit design includes multiple steps to ensure the operability of the designed circuit. One step may be to simulate the operation of the circuit once the layout of the circuit has been designed. One aspect of the simulation may be to determine the effects of noise, such as substrate noise, on analog portions of the circuit. The results of the simulation may indicate a need to alter or re-design the circuit to allow proper functionality in different circumstances.
An electronic design automation (EDA) tool is typically used when simulating integrated circuit. An EDA generally requires a completed circuit layout to perform the simulation and analysis. The EDA may analyze the effect of substrate noise on the circuit. Once the effects are determined, a complete re-design of the integrated circuit may be necessary to bring the functionality of the circuit within acceptable ranges. Further, multiple reiterations of the re-design process may be necessary.
Also, simulation using the completed layout on an EDA may require de-bugging complicated netlists. The de-bugging process may be very frustrating for a designer and may require the support of the EDA vendor. Thus, the EDA simulation is not very user-friendly.
Another method may be to use device models and substrate networks for noise analysis. However, this method uses simplified models based on assumptions that some effects are negligible when those effects may not be. Thus, the method generally is too simplified to accurately predict substrate noise for every circuit. Also, the substrate networks used in this method are typically very complicated which leads to complex netlists that are too specific to use for every substrate.
Thus, there is a need in the art to overcome the above stated disadvantages.